general description the AMS811 / 812 are low-power microprocessor (?) supervisory circuits used to monitor power sup- plies in ? and digital systems. they provide excellent circuit reliability and low cost by eliminating external components and adjustments when used with 5v- powered or 3v-powered circuits. the AMS811 / 812 also provide a debounced manual reset input. these devices perform a single function: they assert a reset signal whenever the v cc supply voltage falls below a preset threshold, keeping it asserted for at least 140ms after v cc has risen above the reset thresh- old. the only difference between the two devices is that the AMS811 has an active-low reset output (which is guaranteed to be in the correct state for v cc down to 1v), while the ams812 has an active-high reset out- put. the reset comparator is designed to ignore fast transients on v cc . reset thresholds are available for operation with a variety of supply voltages. low supply current makes the AMS811 / 812 ideal for use in portable equipment. the devices come in a 4-pin sot143 package. ________________________applications computers controllers intelligent instruments critical ? and ? power monitoring portable/battery-powered equipment features ?? precision monitoring of 3v, 3.3v, and 5v power-supply voltages ?? 6 a supply current ?? 140ms min power-on reset pulse width; rr ee ss ee tt output (AMS811), reset output (ams812) ?? guaranteed over temperature ?? guaranteed rr ee ss ee tt valid to v cc = 1v (ams 811) ?? power-supply transient immunity ?? no external components ?? 4-pin sot143 package 1 2 4 3 v cc mr (reset) reset gnd sot143 top view ( ) are for ams812 note: see last page for marking information. ___________________pin configuration v cc v cc reset (reset) reset input gnd v cc gnd p ( ) are for ams812 pushbutton switch mr ___________typical operating circuit part * AMS811_eus-t ams812_eus-t -40? to +85? -40? to +85? temp range pin-package 4 sot143 4 sot143 _______________ordering information * this part offers a choice of five different reset threshold volt- ages. select the letter corresponding to the desired nominal reset threshold voltage, and insert it into the blank to complete the part number. devices are available in both leaded and lead-free packaging. specify lead-free by replacing ?t?with ?t?when ordering. reset threshold suffix voltage (v) l 4.63 m 4.38 t 3.08 s 2.93 r 2.63 AMS811 ams812 AMS811 ams812
absolute maximum ratings electrical characteristics (v cc = 5v for l/m versions, v cc = 3.3v for t/s versions, v cc = 3v for r version, t a = -40?c to +85?c, unless otherwise noted. typical values are at t a = +25?c.) (note 1) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. terminal voltage (with respect to gnd) v cc ......................................................................-0.3v to 6.0v all other inputs.......................................-0.3v to (v cc + 0.3v) input current, v cc, mr reset reset t st tr str t sre tm msrst t msm t t msrst msm mss ms msm tm ts m mr r mr mr mr m r rt s r r rt ts m t m sm rmeter msm s tm msrst s tm reset ms tm msm tm msrst mr t mr r t rtt msr t t t t mst t t t t t t t
electrical characteristics (continued) (v cc = 5v for l/m versions, v cc = 3.3v for t/s versions, v cc = 3v for r version, t a = -40?c to +85?c, unless otherwise noted. typical values are at t a = +25?c.) (note 1) note 1: production testing done at t a = +25?c, over temperature limits guaranteed by design using six sigma design limits. note 2: reset msresetms msrst s tm msm sre tm msm s tm s msrst sre tm ts reset ms ts m t m sm rmeter
190 power-up reset timeout vs. temperature 230 temperature ( reset threshold deviation vs. temperature 0.9995 1.0000 1.0005 temperature ( power-down reset delay vs. temperature ( ams81_l/m) 200 temperature ( supply current vs. temperature ( ams81_r/s/t) 2.0 2.5 3.0 temperature ( supply current vs. temperature ( ams81_l/m) 8 temperature ( power-down reset delay vs. temperature ( ams81_r/s/t) 80 100 temperature (
pin description _______________detailed description reset output a microprocessor? (??) reset input starts the ? in a known state. these ? supervisory circuits assert reset to prevent code execution errors during power-up, power-down, or brownout conditions. reset is guaranteed to be a logic low for v cc > 1v. once v cc exceeds the reset threshold, an internal timer keeps reset low for the reset timeout period; after this interval, reset goes high. if a brownout condition occurs (v cc dips below the reset threshold), reset goes low. any time v cc goes below the reset threshold, the internal timer resets to zero, and reset goes low. the internal timer starts after v cc returns above the reset threshold, and reset remains low for the reset timeout period. the manual reset input ( mr ) can also initiate a reset. see the manual reset input section. the ams812 has an active-high reset output that is the inverse of the AMS811? reset output. manual reset input many ?-based products require manual reset capabil- ity, allowing the operator, a test technician, or external logic circuitry to initiate a reset. a logic low on mr asserts reset. reset remains asserted while mr is low, and for the reset active timeout period (t rp ) after mr returns high. this input has an internal 20k pull-up resistor, so it can be left open if it is not used. mr can be driven with ttl or cmos-logic levels, or with open- drain/collector outputs. connect a normally open momentary switch from mr to gnd to create a manual- reset function; external debounce circuitry is not required. if mr is driven from long cables or if the device is used in a noisy environment, connecting a 0.1? capacitor from mr to ground provides additional noise immunity. reset threshold accuracy the AMS811/ams812 are ideal for systems using a 5v ?% or 3v ?% power supply with ics specified for 5v ?0% or 3v ?0%, respectively. they are designed to meet worst-case specifications over temperature. the reset is guaranteed to assert after the power supply falls out of regulation, but before power drops below the minimum specified operating voltage range for the system ics. the thresholds are pre-trimmed and exhibit tight distribution, reducing the range over which an undesirable reset may occur. manual reset input. a logic low on mr asserts reset. reset remains asserted as long as mr is low and for 180ms after mr returns high. this active-low input has an internal 20k pull-up resistor. it can be driven from a ttl or cmos-logic line, or shorted to ground with a switch. leave open if unused. 3 3 +5v, +3.3v, or +3v supply voltage 4 4 active-high reset output. reset remains high while v cc is below the reset threshold or while mr is held low. reset remains high for reset active timeout period (t rp ) after the reset condi- tions are terminated. 2 active-low reset output. reset remains low while v cc is below the reset threshold or while mr is held low. reset remains low for the reset active timeout period (t rp ) after the reset conditions are terminated. 2 ground 1 1 function pin mr v cc reset reset gnd name AMS811 ams 812
__________ applications information negative-going v cc transients in addition to issuing a reset to the ? during power-up, power-down, and brownout conditions, the AMS811/ ams812 are relatively immune to short duration nega- tive-going v cc transients (glitches). figure 1 shows typical transient durations vs. reset comparator overdrive, for which the AMS811/ams812 do not generate a reset pulse. this graph was generat- ed using a negative-going pulse applied to v cc , start- ing above the actual reset threshold and ending below it by the magnitude indicated (reset comparator over- drive). the graph indicates the typical maximum pulse width a negative-going v cc transient may have without causing a reset pulse to be issued. as the magnitude of the transient increases (goes farther below the reset threshold), the maximum allowable pulse width decreases. typically, a v cc transient that goes 125mv below the reset threshold and lasts 40? or less (ams81_l/m) or 20? or less (ams81_t/s/r) will not cause a reset pulse to be issued. a 0.1? capacitor mounted as close as possible to v cc provides addi- tional transient immunity. ensuring a valid reset when v cc falls below 1v, the AMS811 reset output no longer sinks current?t becomes an open circuit. therefore, high-impedance cmos-logic inputs con- nected to the reset output can drift to undetermined voltages. this presents no problem in most applica- tions, since most ? and other circuitry is inoperative with v cc below 1v. however, in applications where the reset output must be valid down to 0v, adding a pull- down resistor to the reset pin will cause any stray leakage currents to flow to ground, holding reset low (figure 2). r1? value is not critical; 100k is large enough not to load reset and small enough to pull reset to ground. a 100k pull-up resistor to v cc is also recommended for the ams812 if reset is required to remain valid for v cc < 1v. 5 6 7 8 4 0 1 100 1000 2 1 3 reset comparator overdrive , v th - v cc (mv) maximum transient duration (ms) 10 t a = +25 c ams 81 _l/m ams 81 _r/s/t r1 v cc gnd reset figure 1. maximum transient duration without causing a reset pulse vs. comparator overdrive figure 2. reset valid to v cc = ground circuit AMS811
interfacing to ps with bidirectional reset pins ?s with bidirectional reset pins (such as the motorola 68hc11 series) can contend with the AMS811/ams812 reset outputs. if, for example, the AMS811 reset out- put is asserted high and the ? wants to pull it low, indeterminate logic levels may result. to correct such cases, connect a 4.7k resistor between the AMS811 reset (or ams812 reset) output and the ? reset i/o (figure 3). buffer the reset output to other system com- ponents. 4.7k v cc gnd reset reset v cc gnd p buffer buffered reset to other system components figure 3. interfacing to ?s with bidirectional reset i/o AMS811
4.0 ? ? sot-23 5l .eps package information
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